2020

• V. Kumar, S. Yadav, D.N. Sandeep, S.B. Dhok, R.K. Barik, A.P. Singh, “Optimal Cluster Count and Coverage Analysis in a Gaussian Distributed WSNs Using TESM”, Frontiers in Intelligent Computing: Theory and Applications, 335-345, 2020
• P. Bhoyar, S.B. Dhok, R.B. Deshmukh, “Hardware Implementation of Simeck Cipher as a Lightweight Hash Function”, Advances in VLSI, Communication, and Signal Processing, Allahabad, India, 125-131, 2020
• S. Yadav, V. Kumar, S.B. Dhok, G. Srivastava, A.P. Singh, M.K. Gupta, “BER Performance Evaluation of Different Modulation Techniques for Underwater FSO Communication System”, Advances in VLSI, Communication, and Signal Processing, Allahabad, India, 44503, 2020
• M. Rani, S.B. Dhok, R.B. Deshmukh, “EEG Seizure Detection from Compressive Measurements”, Advances in VLSI, Communication, and Signal Processing, , Allahabad, India, 963-969, 2020

2019

• Pravin Zode, Pradnya Zode, R. B. Deshmukh, “FPGA Based Novel True Random Number Generator using LFSR with Dynamic Seed”, IEEE INDICON-2019 (16th IEEE India Council Annual meet), Rajkot (India), 13-15 Dec. 2019
• T. Gawande, R. B. Deshmukh, R. M. Patrikar, Sharvari Deshmukh, “Inherent MEMS sensor array variability reduction using robust regression”, 2019 IEEE Bombay Section Signature Conference (IBSSC), 1-4, 2019
• T. Pravinraj, R. M. Patrikar, “Modeling, fabrication and investigation of mixing in low-cost passive PDMS micromixers”, 32nd International Conference on VLSI Design, Delhi, India, 5-9 Jan. 2019
• V. Pulijala, A. Syed, “Effects of Heating on the Performance of 70 nm Thick Domain Patterned Permalloy Incorporated RF Spiral Inductors”, 2019 IEEE 14th International Conference on Nano/Micro Engineered and Molecular Systems (NEMS), Bangkok, Thailand, Thailand, 11-14 April 2019
• C.S. Tejaswi Issarapu, R.C. Junghare, Ganesh C. Patil, “First principle study of Germanium and Selenium doped monolayer black phosphorus”, Proc. of TechConnect World Innovation Conference and Expo, co-located with the Nanotech-2019 and AI TechConnect, Hynes Convention Center, Boston, Massachusetts, U.S.A. June 17-19, 2019
• R.C. Junghare and Ganesh C. Patil, “Ab-initio tight binding Hamiltonian generation for 1D and 2D MoS2 based Devices”, Proc. of TechConnect World Innovation Conference and Expo, co-located with the Nanotech-2019 and AI TechConnect, Hynes Convention Center, Boston, Massachusetts, U.S.A. June 17-19, 2019
• A. Shukla, R.C. Junghare, Ganesh C. Patil, “Effect of Strain on Electronic Transport in Silicene Nanoribbon using Tight Binding Model”, Proc. of TechConnect World Innovation Conference and Expo, co-located with the Nanotech-2019 and AI TechConnect, Hynes Convention Center, Boston, Massachusetts, U.S.A. June 17-19, 2019
• B. Kranthi Kumar and N. D. Gupta, “Recent Advancement in the Design of Perovskite Solar Cell”, 3rd International Conference on Solar Energy Photovoltaics (ICSEP-2019), Bhubaneswar (India), Materials Today: Proceedings, 19th -21st Dec. 2019
• P. Kawde and N. D. Gupta, “Frustum Shaped Cavity Based Microwave Electrothermal Thruster for Nanosatellites”, IEEE INDICON-2019 (16th IEEE India Council Annual meet) Rajkot (India), IEEE Conference Proceedings, Dec. 2019
• A.L. Prasanna, V. Kumar, S. Yadav, S.B. Dhok, P. Dhule, L. Wuttisittikulkij, “Link Energy Minimization in Magnetic Induction based Non-Conventional WSNs”, 16th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), Pattaya, Chonburi, Thailand, Thailand, 10-13 July 2019
• A.M. Bhujade, R.C. Junghare, Ganesh C. Patil, “Impact of Zig-Zag Layer on MoS2 based Nanoribbon Gate-all-Around Field Effect Transistor”, IEEE INDICON-2019 (16th IEEE India Council Annual meet), Rajkot (India), 13-15 Dec. 2019

2018

• Ashutosh Mahajan, Ravi Solanki, Rosalina Sahoo and Rajendra Patrikar, “Modeling and Finite Element Simulation of Gate Leakage in Cylindrical GAA Nanowire FETs”, International Conference on Simulation of Semiconductor Processes and Devices 2018,USA, 24-26 Sep. 2018
• Pravinraj, T. and Patrikar, R.: Fabrication and LBM-modeling of directional fluid transport on low-cost electrosomotic flow device” In: Rajaram S.,Balamurugan N B (eds) VLSI Design and Test. VDAT 2018, Communications in Computer and Information Science, Springer, Singapore (2018)
• R Dhavse, K Prashant, C Dabhi, A Darji, R. M. Patrikar, Fabrication and investigation of low-voltage programmable flash memory gate stack, , Proceedings of the International Conference on Microelectronics, Computing & Communication Systems, 2018
• AL Rajesh, R. M. Patrikar, “An Optimized Design Strategy and a Paradigm for Low Power IoT Devices”, 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2018
• A Raveendran, S. B. Dhok, R. M. Patrikar, “High Level Synthesis and Implementation of Cryptographic Algorithm in AHIR Platform”, International Symposium on VLSI Design and Test, 16-27, 2018
• AL Rajesh, SV Kadam, R. M. Patrikar, “A Complete Hardware Advent on IEEE 802.15. 4 Based Mac Layer and a Comparison with Open-ZB”, International Symposium on VLSI Design and Test, 682-694, 2018
• A Morankar, R. M. Patrikar, “Effective Method for Temperature Compensation in Dual Band Metal MEMS Resonator”, International Symposium on VLSI Design and Test, 233-241, 2018
• S Thool, R. B. Deshmukh, R. M. Patrikar, “Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications”, International Symposium on VLSI Design and Test, 705-719, 2018
• J Srivastava, R. M. Patrikar, “Continuous Flow Microfluidic Channel Design for Blood Plasma Separation”, International Symposium on VLSI Design and Test, 264-277, 2018
• V Jain, R. M. Patrikar, R. B. Deshmukh, “Real Time Mixing Index Measurement of Microchannels Using OpenCV”, International Symposium on VLSI Design and Test, 278-284, 2018
• C Chinta, R. B. Deshmukh, “High Speed Most Significant Bit First Truncated Multiplier”, 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2018
• V Kokkula, A Joshi, R. B. Deshmukh, “Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region”, International Symposium on VLSI Design and Test, 109-120, 2018
• A Kulkarni, V Kumar, S. B. Dhok, “Enabling Technologies for Range Enhancement of MI Based Wireless Non-Conventional Media Communication, 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2018.
• SB Dhule, V. Pulijala, “Novel RF MEMS Capacitive Switch for Lower Actuation Voltage”, International Symposium on VLSI Design and Test, 285-294, 2018,
• Balaji S Lone, Rajesh Junghare, Ganesh C. Patil, “Comparative study of monolayer MoS2 based double gate FETs with Schottky contacts and Doped reservoirs at the scaling limit”, 4th IEEE International Conf. on Emerging Electronics, 16th – 19th Dec. 2018, IISC Bangalore.
• Ishan C. Ghosekar and Ganesh C. Patil, “Optimizing device efficiency of P3HT/P3HT:PCBM interlayer organic solar cell: Annealing dependent study “, 4th IEEE International Conf. on Emerging Electronics, 16th – 19th Dec. 2018, IISC Bangalore.
• Ishan C. Ghosekar and Ganesh C. Patil, “Design and Fabrication of P3HT inter layer polymer solar cells for improving efficiency “, International workshop on Nano/Micro 2D-3D fabrication, manufacturing of electronic -biomedical devices and applications (IWNEBD-2018) 31st Oct. to 2nd Nov. 2018, Indian Institute of Technology, Mandi, India.
• Suyog T. Ingale, Ganesh C. Patil and B. R. Sankapal, ” Fabrication and characterisation of a novel MWCNT based junctionless transistor using chemical bath deposition”, International workshop on Nano/Micro 2D-3D fabrication, manufacturing of electronic -biomedical devices and applications (IWNEBD-2018) 31st Oct. to 2nd Nov. 2018, Indian Institute of Technology, Mandi, India.
• Ishan C. Ghosekar and Ganesh C. Patil, ” Enhancing the performance and thermal stability of organic solar cells by addition of P3HT layer at hole transporting interface”, 5th International Symposium on Semiconductor Materials and Devices, 30th Nov. to 2nd Dec. 2018, Visvesvaraya National Institute of Technology, Nagpur (Best Poster Award)
• Rajesh C. Junghare, and Ganesh C. Patil, Comparative Analysis of band structures of Monolayer MoS2 obtained using Ab-initio tight binding approach, 5th International Symposium on Semiconductor Materials and Devices, 30th Nov. to 2nd Dec. 2018, Visvesvaraya National Institute of Technology, Nagpur
• T Pravinraja and R. M. Patrikar, Effect of surface roughness on mixing in polysilicon microfluidic devices
• Raveesh Gourishetty, Ravi Solanki1, Ashutosh Mahajan and R. M. Patrikar, QuTSim: A Quantum Tunneling Simulator, 5th International Symposium on Semiconductor Materials and Devices, 30th Nov. to 2nd Dec. 2018, Visvesvaraya National Institute of Technology, Nagpur
• Akanksha D. Singh and R. M. Patrikar, fabrication and Characterization of electrostatically actuated MEMS cantilever based sensor, 5th International Symposium on Semiconductor Materials and Devices, 30th Nov. to 2nd Dec. 2018, Visvesvaraya National Institute of Technology, Nagpur (Best Poster Award)
• Pooja Kawde and Nikhil Deep Gupta , Light Power Mems Based Microwave Electrothermal Thruster For Nanosatellite With Helium Propellant, 5th International Symposium on Semiconductor Materials and Devices, 30th Nov. to 2nd Dec. 2018, Visvesvaraya National Institute of Technology, Nagpur
• A. D. Singh, R. M. Patrikar, “MEMS Cantilever based Chemosensor for Plant Disease detection using Volatile Organic Compounds”, 4th IEEE International Conf. on Emerging Electronics, 16th – 19th Dec. 2018, IISC Bangalore. (Best Poster Award)
• R. Solanki, A. Mahajan, R. M. Patrikar, “Modeling of Program/ Erase Transient in SiNx based Charge Trap Memories”, 4th IEEE International Conf. on Emerging Electronics, 16th – 19th Dec. 2018, IISC Bangalore

2017

• T Pravinraj and Rajendra Patrikar “Modelling And Characterization Of Droplet Impingement And Splitting Using Lattice Boltzmann Method For Lab On A Chip Applications” 8th ISSS International Conference on Smart Materials, Structures and Systems July 5-7, 2017, IISc Bangalore, India.

• T Pravinraj and Rajendra Patrikar “Inductive Splitting and Transport of a Droplet with no external actuation force for Lab on Chip devices”, 21st International Symposium on VLSI Design & Test (VDAT) Symposium, June29- July2, 2017, IIT Roorkee, India.
• Akash V. Joshi, Raghavendra Deshmukh and Rajendra Patrikar, “A Hysteresis Controlled Resolution for Level Crossing Sampling ADC”, INDICON 2017, 14th IEEE INDIA COUNCIL INTERNATIONAL, ID 1015, IIT Roorkee, Dec 15-17, 2017.
• Ishan C. Ghosekar and Ganesh C. Patil, “Concentration dependent blended P3HT: PCBM inverted organic solar cell using solution- processed ZnO Electron transport layer”, XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017), Dec. 11-15, 2017, IIT Delhi, India.
• Garike Ramarao, Ishan C. Ghosekar and Ganesh C. Patil, “Dual-k HfO2 Spacer Bulk Planar Junctionless Transistor for Sub-30 nm Low Power CMOS”, 14TH IEEE INDIA COUNCIL INTERNATIONAL CONFERENCE (INDICON) 2017, DEC 15-17, IIT ROORKEE, INDIA.
• Pravin Zode, Abdus Samad and Raghavendra Deshmukh. “Fast Architecture of Modular Inversion using Itoh-Tsujii Algorithm” 21st International Symposium on VLSI Design & Test (VDAT) Symposium, June29- July2, 2017, IIT Roorkee, India.

2016

• Ravi Solanki, Ashutosh Mahajan and Rajendra M. Patrikar, “Finite Element Modeling of Retention Process in high-k Interpoly Dielectric Nanocrystal Flash Memories”, Proc. of 3rd International Conference on Emerging Electronics (ICEE), December 27-30, 2016, IIT Bombay, India

• Ganesh C. Patil “Comparative Analysis of Partial Buried Oxide Germanium -on -insulator p -Channel MOSFETs”, Proc. of 3rd International Conference on Emerging Electronics (ICEE), December 27-30, 2016, IIT Bombay, India

• Amol Morankar and Rajendra M. Patrikar, “RF MEMS Band Pass Filter”, Proc. of 3rd International Conference on Emerging Electronics (ICEE), December 27-30, 2016, IIT Bombay, India

• Vandana Jain, Rajendra M. Patrikar,  “Real Time Droplet Velocity Measurement using open source Computer Vision for EWOD Device”,  Eighth ISSS National Conference on MEMS, Smart Materials, Structures and System, 28th-30th September 2016,  IIT Kanpur.

2015

• Ashish V. Jawke, and Ganesh C. Patil, ” A Comparative Study of Analog/RF performance of GaAs-on-Si and Si MOSFETs”, Proc. Of International 18th International Workshop on Physics of Semiconductor Devices (IWPSD) Dec. 7-10, 2015,IISc Bangalore, India.

• Ashish V. Jawke, Sayli R. Aher, Harshad S. Borse, Kalyani S. Bhosle, Subhash R. Patil and Ganesh C. Patil, “Comparative Analysis of GaN-on-3CSiC and Conventional Si MOSFET for Digital Integrated Circuits”, Proc. of Annual IEEE India Conference (INDICON), Dec. 17-20, 2015, Delhi, India

• Sayli R. Aher, Ashish V. Jawke, Harshad S. Borse, Kalyani S. Bhosle, Subhash R. Patil and Ganesh C. Patil, ” Comparative Study of Ge pMOS and In0.3Ga0.7As nMOS with Si MOSFETs for Digital Applications “, Proc. of Annual IEEE India Conference (INDICON), Dec. 17-20, 2015, Delhi, India

• RasikaDhavse, Kumar Prashant, Chetan Dabhi, R. M. Patrikar, “Fabrication and Investigation of Low Voltage Programmabe Flash Memory Gate stack”,  November 2015, 1st International Conference on Micro-electronics, Computing & Communication Systems (MCCS-2015)

• AadityaHambarde, R. M. Patrikar, “Optimal Design of Coupled Microelectromechanical Resonating Arrays for Mass Sensing”, October 2015, COMSOL Conference, Pune, India.

• Rajesh Junghare, VinayakPachkawade, R. M. Patrikar, “A 2.47 GHz ultra NanoCrystaline diamond disk resonator with temperature compensation for RF application”, June 2015, 19th International Symposium on VLSI Design and Test (VDAT)

• VinayakPachkawade, Rajesh Junghare, R. M. Patrikar, “A small bandwidth microelectromechanical ring resonator-based bandpass filter, June 2015  19th International Symposium on VLSI Design and Test (VDAT)

• Ashish V. Jawke, Sayli R. Aher, Harshad S. Borse, Kalyani S. Bhosle, Subhash R. Patil and Ganesh C. Patil,  “A Novel GaAs-on-Si MOSFET for Analog Integrated Circuits”, Proc. of NSTI Nanotech, Jun. 14-17, 2015,Washington DC, USA.

• Subhash R. Patil, Ganesh C. Patil, Harshad S. Borse, Kalyani S. Bhosle, Ashish V. Jawke and Sayli R. Aher,  “A novel dual-k spacer double gate junctionless transistor for digital integrated circuits”, Proc. of NSTI Nanotech, Jun. 14-17, 2015,Washington DC, USA.

• Kalyani S. Bhosale, Ashish V. Jawke, Sayli R. Aher, Harshad S. Borse, Subhash R. Patil  and Ganesh C. Patil, “Impact of Gate Oxide Thickness and Channel Thickness on DC Performance of Carbon Nanotube Tunnel FET”, Proc. of NSTI Nanotech, Jun. 14-17, 2015,Washington DC, USA

• Harshad S. Borse, Ashish V. Jawke, Sayli R. Aher, Kalyani V. Bhosle, Subhash R. Patil, Ganesh C. Patil, and Dattatraya S. Bormane  “Impact of High-k gate oxide on Intrinsic Device Performance of Junctionless Transistor”, Proc. of NSTI Nanotech, Jun. 14-17, 2015,Washington DC, USA.

2014

• AM Joshi, V Mishra, RM Patrikar, “Low complexity hardware implementation of quantization and CAVLC for H. 264 encoder” , Proc. of IEEE International Conference on Computational Intelligence and Computing Research (ICCIC),18-20 Dec. 2014, Coimbatore,  pp. 1 – 5 (ISBN:978-1-4799-3974-9)

• Ganesh C. Patil,  Vijaysinh H. Bonge, Mayur M. Malode and Rahul G. Jain,  “Novel Partially Insulated Junctionless Transistor for Low Power Nanoscale Digital Integrated Circuits”, Proc. 2014 IEEE International Conference on Emerging Electronics (ICEE-2014), Dec. 3-6, 2014, IIScBanglore, India, pp.1-4. (ISBN No.: 978-1-4673-6527-7)PP Zode, RB Deshmukh, “Fast modular multiplication using parallel prefix adder”, Proc. of International Conference onEmerging Technology Trends in Electronics, Communication and Networking (ET2ECN),  26-27 Dec. 2014, Surat, pp. 1 – 4, (ISBN No.: 978-1-4799-6985-2)

• R Dhavse, K Suresh, V Mishra, R Patrikar, “Memory Behaviour and Distributed Capacitive Coupling Model for Low Frequency Inversion Capacitance of a Quantum Dot Flash Memory Gate Stack”, Proc. of 8th Asia Modelling Symposium (AMS),  23-25 Sept. 2014, Taipei, pp. 241 – 246(ISBN:978-1-4799-6486-4

• R Dhavse, F Muhammed, C Sinha, V Mishra, RM Patrikar, “ Simulation of Quantum Dot Flash Gate Stack with Lower Tunneling Voltages”, Proc. of International Conference on Devices, Circuits and Communications (ICDCCom),12-13 Sept. 2014, Ranchi, pp. 1 – 6,

• P Sahare, VR Satpute, SB Dhok, “Comparative analysis of time elapsed & PSNR calculations for encoder and decoder in video codec (s) for different video formats”, Proc. of Students Conference on Engineering and Systems (SCES), 28-30 May 2014, pp. 1 – 6 Allahabad,  (ISBN:978-1-4799-4940-3)

• RE Chaudhari, SB Dhok, “Wavelet transformed based fast fractal image compression”, Proc. of  International Conference on Circuits, Systems, Communication and Information Technology Applications (CSCITA), 4-5 April 2014, pp. 65 – 69, Mumbai.

• VP Bhale, UD Dalal, RM Patrikar, “A high stability and excellent gain flatness 3–5 GHz 0.18μm CMOS low noise amplifier for ultra-wide-band applications”, Proc. of International Conference on Devices, Circuits and Systems (ICDCS), 6-8 March 2014, Combiatore , pp. 1 – 6

• CT Kukade, RB Deshmukh, RM Patrikar, “A Novel Parallel Multiplier for 2’s Complement Numbers Using Booth’s Recoding Algorithm”, Proc. of International Conference on Electronic Systems, Signal Processing and Computing Technologies (ICESC),  9-11 Jan. 2014, Nagpur, India, pp. 93 – 98

• AV Mire, SB Dhok, PD Porey, NJ Mistry, “Digital Forensic of JPEG Images”, Proc. of International Conference on Signal and Image Processing (ICSIP), 2014 ,8-10 Jan. 2014, pp. 131 – 136, Jeju Island.

• J Kalambe, R Patrikar “Design and Development of Microcantilever Based Detector”, Proc. of International Conference on Electronic Systems, Signal Processing and Computing Technologies (ICESC),9-11 Jan. 2014, Nagpur, pp. 335 – 340

• Ganesh C. Patil, S, C. Wagaj and P. M. Ghate, ” A simple analytical model of 4H-SiC MOSFET for high temperature circuit simulations”, Proc. of Annual IEEE India Conference (INDICON), 2014, Pune, India, pp. 1-5. (ISBN No.: 978-1-4799-5362-2)

• PP Zode, RB Deshmukh, “ Novel fault attack resistant Elliptic Curve processor architecture”, Proc. of Annual IEEE India Conference (INDICON), 2014, Pune, India, pp. 1-5. (ISBN No.: 978-1-4799-5362-2)

2013

• R Dhavse, F Muhammed, C Sinha, V Mishra, RM Patrikar, “Memory characteristics of a 65 nm FGMOS capacitor with Si quantum dots as floating gates”, Proc. of Annual IEEE India Conference (INDICON),13-15 Dec. 2013, Mumbai, , pp.1 – 3 (ISBN:978-1-4799-2274-1)

• P Borkar, J Kalambe, R Patrikar, “Impact of design parameters on actuation voltage and response time for micro-cantilever based device”, Proc. of Annual IEEE India Conference (INDICON),  13-15 Dec. 2013, Mumbai , pp.1 – 6 (ISBN:978-1-4799-2274-1)

• Prasanna Kumar Misra, Ganesh C. Patil and S. Qureshi, “Process and device simulations to study the impact of Ge profile of 65 nm NPN SOI HBT with buried layer”, Proc. of 2013 IEEE INDICON, Dec. 13-15, 2013,IIT Bombay, India, pp. 65-68. (ISSN No.: 978-1-4799-2274-1 )

• T Pravinraj and  RajendraPatrikar,“ Fabrication and Characterization of  low cost electro-osmotic flow device micro scale transport” 8th ISSS National Conference on MEMS, Smart Materials, Structures and Systems, September 28- 30, 2013, IIT Kanpur, India

• RE Chaudhari, SB Dhok “Acceleration of fractal video compression using FFT”, Proc. of  15th International Conference on Advanced Computing Technologies (ICACT), 21-22 Sept. 2013, pp.1 – 4, Rajampet. (ISBN:978-1-4673-2816-6)

• A Deshmukh, RB Deshmukh, RM Patrikar “An efficient implementation of self timed audio Sigma-Delta Modulator”, Proc. of 7th Argentine School of Micro-Nanoelectronics, Technology and Applications (EAMTA),  15-16 Aug. 2013, Buenos Aires, pp. 27 – 31

• S Korde, A Khandare, R Deshmukh, R Patrikar,  “Computational Functions’ VLSI Implementation for Compressed Sensing” VLSI Design and Test, 2013

• J Joseph, R Patrikar, “Impact of Fin Width and Graded Channel Doping on the Performance of 22nm SOI FinFET”, VLSI Design and Test, 2013

• S. Qureshi and Ganesh C. Patiland, “UTBB with Ground-Plane Dopant-Segregated Schottky Barrier SOI MOSFET for Thermally Efficient Low-Variability Nanoscale CMOS Circuits”, Proc. of 2013 IEEE 5th International Nanoelectronics Conference (INEC), Jan. 2-4, 2013, Singapore, pp. 65-68. (ISSN No.: 2159-3523)
• Navin D. Anwani, Raghavendra B. Deshmukh, Rajendra M. Patrikar,“Electrowetting-On-Dielectric basedDigital Microfluidics: Design, Fabrication and testing of a low cost Test-Chip” ISSS National Conference on MEMS, Smart Materials, Structures and Systems 2013.
• Gaurav Pendharkar, Raghavendra Deshmukh, Rajendra Patrikar, “Silicon microchannel fabrication for application in microfluidics”, First National Conference on Micro and Nanofabrication, January 21-23, 2013, Central Manufacturing Technology Institute, Bangalore

2012

• Ganesh C. Patil and S. Qureshi, “A Comparative Study on Analog/RF Performance of Pt-Germanide and Pt-Silicide Schottky Barrier pMOSFETs”, Proc. of IEEE Electron Devices and Solid State Circuits (EDSSC), Dec. 3-5, 2012, Bangkok, Thailand, pp. 1-2. (ISBN No.: 978-1-4673-5694-7 )

• AM Joshi, RM Patrikar, V Mishra, “Design of low complexity video watermarking algorithm based on Integer DCT”, Proc. of International Conference on Signal Processing and Communications (SPCOM),22-25 July 2012, Bangalore pp.1 – 5 (ISBN:978-1-4673-2013-9)

• AK Dwivedi, RB Deshmukh, RM Patrikar, “Modeling and simulation of capacitive sensor for E. Coli bacteria in water”, Proc. of 16th International Workshop on Physics of Semiconductor Devices,2012, Kanpur, India, pp. 1-5.

• J Kalambe, RM Patrikar “Microcantilever based biosensor with electrical read-out method”, Proc. of International Symposium on Physics and Technology of Sensors (ISPTS),7-10 March 2012, Pune , pp. 249 – 252 (ISBN:978-1-4673-1040-6)

• Amit Joshi, Vivekanand Mishra and R. M. Patrikar “Real Time Implementation of Digital Watermarking Algorithm for Image and Video Application”, Watermarking – Volume 2, Dr. Mithun Das Gupta (Ed.), (ISBN: 978-953-51-0619-7), InTech, 2012

• Ganesh C. Patiland S. Qureshi, “Suppression of Variability in Metal Source/Drain SOI MOSFET with Partial Buried Oxide and δ-doping”, Proc. of NSTI Nanotech, Jun. 18-21, 2012, Santa Clara, USA, pp. 44-47. (ISBN No.: 978-1-4665-6275-2)

• Amol Morankar, Dr. R. M. Patrikar, “Design & Simulation of Metal MEM Parallel Beam Resonator”, International Conference on Nano Science & Technology, at International Advance Research Centre for Powder Metallurgy and New Materials, Hyderabad, India, Jan 20th – 23rd 2012

• Jayu P Kalambe, Rajendra M Patrikar, “Microcantilever Based Biosensor with Electrical Read-out Method”, International Conference on Nano Science & Technology, at International Advance Research Centre for Powder Metallurgy and New Materials, Hyderabad, India, Jan 20th – 23rd 2012
• Jayu Kalambe, Rajendra Patrikar “Design and Analysis of Micromachined Cantilever with Control Circuit for Temperature Sensing Application” National Conference on Smart Materials Structures and Systems, September 21-22, 2012, Coimbatore, India.
• Gaurav Pendharkar, Raghavendra Deshmukh, Rajendra Patrikar, “Modeling and Simulation of Electrokinetic Flow with Surface Roughness Effects Using Lattice Boltzmann Method”, Fifth ISSS National Conference on MEMS, Smart Materials, Structures and Systems, September 21-22, 2012,Karpagam University, Coimbatore.

2011

• Gaurav Pendharkar, RaghavendraDeshmukh, RajendraPatrikar, “Effect of Surface Roughness on the single and multiphase fluid flow through microchannel using Lattice Boltzmann method”, Sixteenth International Workshop on Physics of Semiconductor Devices (IWPSD-2011). December 19-22, Indian Institute of Technology, Kanpur

• Raju Lampande, R.B. Deshmukh, R. M. Patrikar,”Influence of Shape and Size on the Optical Properties of Palladium Nanostructures”, IWPSD 2011, Dec 2011

• Kapil Soni; and RajendraPatrikar; “Inductive Degenerated Low noise Amplifier for Wireless Application in 0.18um UMC CMOS”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011.

• Ashwini Shrirao; Rashmi Gautam; and RajendraPatrikar; “Simulation of Low Voltage Flash Memory Cell”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011

• Sujeet Kumar; R.B. Deshmukh; and RajendraPatrikar; “Low Power High Throughput Differential Current Mode Signaling Technique for Global VLSI Interconnect”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011.

• MadhuriBorkar; Rashmi Gautam; and RajendraPatrikar; “Simulation of 22nm n-Metal Oxide Semiconductor Field Effect Transistor”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011

• Anita Arvind Deshmukh, RaghvendraDeshmukh, RajendraPatrikar, “Low Power Asynchronous Sigma-Delta Modulator using Hysteresis Level Control,” 2011 IEEE Conference on Computer Society Annual Symposium on VLSI (ISVLSI) 2011, IIT Madras , 4-6 July 2011, pp. 353-354.

• Y. Sadavarte, Mahendra Gaikwad and RajendraPatrikar “Comparative Study of Switching Techniques for Network-on-Chip Architecture” International Conference on “Communication, Computing & Security-ICCCS 2011” organized by National Institute of Technology (NIT), Rourkela, Odisha, 12-14 Feb. 2011 & published by ACM Digital Library (ISBN-978-1-14503-0464-1).
• Anita Arvind Deshmukh, Raghvendra Deshmukh, Rajendra Patrikar, “Low Power Asynchronous Sigma-Delta Modulator using Hysteresis Level Control,” 2011 IEEE Conference on Computer Society Annual Symposium on VLSI (ISVLSI) 2011, IIT Madras , 4-6 July 2011, pp. 353-354.

2010

• S.B. Dhok ,R.B. Deshmukh and A.G. Keskar”Fast Fractal Encoding through FFT using modified cross correlation based similarity measure “, International conference on Advanced Topics in Artificial Intelligence (ATAI) Phuket, Thailand Nov 2010.

• Atul Kumar Dwivedi, Gaurav pendharkar, R.B.Deshmukh, R.M. Patrikar, “Detection of E.Coli Cell using capacitance modulation”, Comsol conference Bangalore, India,October 29-30, 2010. (awarded 2nd prize by juri’s choice)

• Praveen Kumar Reddy, RajendraPatrikar,”A Novel Curvature Compensation Technique for voltage reference circuit”, 14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.

• Anita Deshmukh, Ravi Patil, RaghvendraDeshmukh, RajendraPatrikar,”Asynchronous ADC Using Novel Asynchronous Subranging Scheme”,14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.

• Anurag Zope, W Khokle, RaghvendraDeshmukh, RajendraPatrikar”, Constant Bias Current Gain Variation Method for Weak and Strong Inversion MOSFETs,” 14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.

• Mahendra Gaikwad, RajendraPatrikar and Abhay Gandhi “Energy-aware Network-on-Chip architecture using Perfect Difference Network” International Conference on Advances in Computer Engineering-ACE-2010 organized by ACEE &IEEEXplore CPS, Banglore, 21-22 June 2010. (Recipient of First Best Research Paper of the Conference)

• Raju Lampande, NileshBarange, RajendraPatrikar, “Nanoparticles Marker for Biological application using surface enhanced Raman Spectroscopy”, Nanotech conference & Expo 2010 , Anaheim CA ,USA.

• Anita Deshmukh, Ravi Patil, ,RaghavendraDeshmukh and RajendraPatrikar “Asynchronous ADC Using Novel Asynchronous Subranging Scheme,” VDAT2010, Chitkara University, 7-9 July 2010, pp 41-52.

• Kalyani Patrikar, Rashmi Gautum,”Simulation of thermodynamics properties of Silicon quantum dots /Nanocrystal on Silicon dioxide and Hafnium oxide film”,National Conference on Nanomaterials & Nano Technology (NCNN)Jan 2010,V.N.I.T.Nagpur.

• Raju Lampande, NileshBarange, Hassan Razaa, R. B. Deshmukh, R. M. Patrikar ” Optical Properties of Silicon nanostructures for biological application”, National Conference on Nanomaterials &NanoTechnology (NCNN) Jan-2010. VNIT Nagpur.

• Raju Lampande, R. B. Deshmukh, R. M. Patrikar “Analysis of Metal nanostructures for Solar cell”, National Conference on Nanomaterials &NanoTechnology(NCNN) Jan 2010. V.N.I.T. Nagpur.

• Sneha Cherian Earaly, Rashmi Gautaum, R. M. Patrikar “, Simulation of Silicon Nanowire Transistor”, National Conference on Nanomaterials & Nano Technology(NCNN) Jan 2010. V.N.I.T. Nagpur.

• Krishna Reddy , Rashmi Gautum, R. M. Patrikar “Process Simulation of Hot-wire Chemical Vapor Deposition of Silicon Thin Films”, National Conference on Nanomaterials & Nano Technology(NCNN) Jan 2010. V.N.I.T. Nagpur.

• Jaganshivaratri, Rashmi Gautum, R. M. Patrikar,” Simulation of carbon nanotube field effect transistor”, National Conference on Nanomaterials & Nano Technology (NCNN) Jan 2010. V.N.I.T. Nagpur.

• B. Kranthi Kumar, Rashmi Gautum, R.M. Patrikar “Simulation of quantum dot floating gate EEPROM cell”, National Conference on Nanomaterials & Nano Technology (NCNN) Jan 2010. V.N.I.T. Nagpur.

• Gaurav Pendharkar, NileshBarange, R B. Deshmukh, R. M. Patrikar, “Modeling and simulation of microchannel flow using Lattice Boltzmann method”,National Conference on Nanomaterials & Nano Technology (NCNN) Jan 2010. V.N.I.T. Nagpur.

• NileshBarange, C.T. kukade, R.M. Patrikar, “Atomistic material failure simulation”, National Conference on Nanomaterials & Nano Technology (NCNN) Jan 2010. V.N.I.T. Nagpur.

• SidhheshBehere , NileshBarange, Jatin Bhatt, R. M. Patrikar “Synthesis and characterization of Si Quantum dots”, National Conference on Nanomaterials & Nano Technology (NCNN) Jan 2010. V.N.I.T. Nagpur.

• KalyaniPatrikar, Rashmi, “Growth of silicon quantum dot/Nanocrystals on hafnium oxide films”, proc. of International conference on NANO Technology materials and composites for frontier applications, Pune,2010.

• Sanjay Sahare, ChandrashekharKukade, Rashmi, RajendraPatrikar “Formation of silicon quantum dots using LPCVD on substrate treated with rapid thermal processing”, proc. of International conference on NANO Technology materials and composites for frontier applications,2010,pune.

• Sneha Cherian Earaly, Rashmi, RajendraPatrikar,”Effect of strain on silicon nanowire transistor and its potential application as a biosensor”, proc. of International conference on NANO Technology materials and composites for frontier applications,2010,pune.

• B. Kranthi Kumar, Rahmi, RajendraPatrikar ,”Simulation of quantum dot floating gate EEPROM cell,. Proc. of International conference on NANO Technology materials and composites for frontier applications”,2010,pune.

• Krishna Reddy, ChandrashekharKukade, Rashmi, Rajendrapatrikar, “Computer modeling and simulation of hot wire chemical vapor deposition”, proc. of International conference on NANO Technology materials and composites for frontier applications,2010, Pune.
• Anita Deshmukh, Ravi Patil, ,Raghavendra Deshmukh and Rajendra Patrikar “Asynchronous ADC Using Novel Asynchronous Subranging Scheme,” VDAT2010, Chitkara University, 7-9 July 2010, pp 41-52.
• Kalyani Patrikar, Rashmi Gautum,”Simulation of thermodynamics properties of Silicon quantum dots /Nanocrystal on Silicon dioxide and Hafnium oxide film”,National Conference on Nanomaterials & Nano Technology (NCNN)Jan 2010,V.N.I.T.Nagpur.

2009

• Rashmi and R. M. Patrikar, “Simulation of Nanostructure Floating Gate Asymmetric Channel EEPROM Cells”, Proceedings of XV International workshop on Physics of semiconductor Devices (IWPSD) December 2009, New Delhi.

• Anurag Zope, WamanKhokle, Raghvendra D. Deshmukh, and RajendraPatrikar “Weak Inversion based Low Power Low Noise Sixth order gm-C Filter at 1V for ECG Application with 180nm Technology” VDAT, July 2009

• Raju Lampande, Gaurav Pendharkar and RajendraPatrikar, “Study of Optical Properties of different nanostructures for biomedical application”, Proceedings of XV International workshop on Physics of semiconductor Devices (IWPSD) July 2009, New Delhi.

• JayuKalambe, Anju Gupta, Rajesh Pande, R.M. Patrikar, “Modeling and simulation of MEMS cantilever for Bio-sensor application,” International Conference on MEMS, IIT Madras, Jan 3-5, 2009.

• Raju Lampande, ChandrashekharKukade, Raghvendra D Deshmukh, RajendraPatrikar “ An Algorithm for High speed, Low power Implementation of ModularMultiplier” VDAT 2009

2008

• Pande, Rajesh; Patrikar, Rajendra; “A CAD tool for RF MEMS devices ”, Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific 21-24 March 2008 Page(s):89 – 94 Digital Object Identifier 10.1109/ASPDAC.2008.4484067
• Sudhir G. Akojwar and Rajendra. M. Patrikar “Perfect Difference Set – Networks for Wireless Sensor Networks” 4th IEEE International Conference on Communications and Sensor Networks, IIIT Allahabad, INDIA, Dec 27-29, 2008. pp 95-100.
• Rajendra. M. Patrikar and Sudhir G. Akojwar “Neural Network Based Classification Techniques for Wireless Sensor Network with Cooperative Routing” 12th WSEAS International Conference on COMMUNICATIONS, Heraklion, Greece, July 23-25, 2008, page(s) 433-438
• Meenakshi Bheevgade, and Rajendra M. Patrikar “Implementation of Watch Dog Timer for Fault Tolerant Computing on Cluster Server” PWASET, 2008,Volume 28 April 2008 ISSN 1307-6884, P265-268.

• MeenakshiBheevgade, Manik Mujumdar, RajendraPatrikar and Latesh Malik “Achieving Fault Tolerance in Grid Computing System” COIT-2008, March 2008, P-98-99.

• R.V.Kshirsagar, R.M.Patrikar, Design of a reconfigurable multiprocessor core for higher performance and reliability of embedded systems”, IFIP International Conference on Very Large Scale Integration, held in Nice, France, January 2008

• AmeyWalke, W.S.Khokle, Rajendra M Patrikar “Design of Low Power Low Pass Filter for ECG Application with deep Submicron technology” VDAT 2008-06-19

• VinayakPachkawade, RajendraPatrikar, “ Selecting an optimunm bias current for an auxiliary amplifier for power optimisation” VDAT 2008

• R.M. Badghare, R.B. Deshmukh, R.M. Patrikar “Novel Circuits for Two’s Complement of a Binary Number” IEEE VDAT 2008 (VLSI Design and Test Symposium)

• Manik Mujumdar, MeenakshiBheevgade, Latesh Malik, and RajendraPatrikar “High Performance Computational Grids- Fault tolerance at System Level” ICETET, 2008, P379-383

• Hassan M Raza and R. M. Patrikar “High throughput design & implementation of multi- FFT/IFFT core in FPGA for hardware acceleration”  High performance computing HiPC-2008 SS International conference, Bangalore.

2007

• Harode, A.N.; Pinge, M.; Joshi, A.; Patrikar, R.M.; “Calculation of mobility using Monte Carlo method in a doped semiconducting single wall carbon nanotubes”, Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on 16-20 Dec. 2007 Page(s):943 – 945

• Pande, R.S.; Jalgaonkar, A.; Patrikar, R.M.; A 3-D FEM based extractor for MEMS inductor with Monte-Carlo sampling Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on 16-20 Dec. 2007 Page(s):710 – 713;

• Rajesh S. Pande, R.M. Patrikar, “Finite element analysis and optimization of RF MEMS devices,” International Conference on Computer Aided Engineering (CAE 2007), Indian Institute of Technology, Madras, Dec. 13-15 2007

• Amit N. Harode and R.M. Patrikar, “Hybrid multiscale simulation of heteroepitaxial growth of ultra thin films,” in the International Conference on Computer Aided Engineering, (CAE-2007) December 13 – 15, 2007, Indian Institute of Technology Madras.

• Sudhir G. Akojwar and Rajendra. M. Patrikar “Classification Techniques with Cooperative Routing for Industrial Wireless Sensor Networks”International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering (CISSE 07- Online conference) December 3 – 12, 2007.

• Mahendra Gaikwad, RajendraPatrikar and Abhay Gandhi “Application-specific Buffer Space Allocation for Network-on-Chip Router Design” in 16th Annual Symposium of IEEE Bangalore (INDICON-2007), September 6-8, 2007

• Mahendra Gaikwad, RajendraPatrikar and Abhay Gandhi “CDMA-based Router Architecture for NoC” in IMS Conference 2007 on Trends in VLSI & Embedded Systems organized by Indian Microelectronics Society, India in collaboration with Semi-Conductor Laboratory, Central Scientific Instruments Organisation & Panjab University at Panjab Engineering College, Chandigarh held on August 17-18, 2007

• Rajesh S. Pande, Anoop P. Jalgaonkar, Rajendra M. Patrikar, “Modeling of RF MEMS shunt capacitive switch with FEM,” Proceedings of the IMS conference- 2007 Macmillan advanced research series, Trends in VLSI and embedded systems, Punjab Engg. College, Chandigarh, Aug 17-18 2007 pp 346-349

• SudhirAkojwar, RajendraPatrikar “Neural Networks based Real Time Classifier for Wireless Sensor Networks and Framework for VLSI Implementation,” ISIE2007 IEEE International Symposium on Industrial Electronics June 4-7, 2007

• Sudhir G. Akojwar, R.M.Patrikar, “Classification techniques for sensor data and clustering architecture for wireless sensor networks”, IAENG International conference on communication systems and applications (ICCSA’07) ,IMECS2007 , pp 1246 – 1255, Hong Kong, 21-23 march, 2007.

• Sanjiv K. Mangal, Rahul.M.Badghare,R.B.Deshmukh, and R.M.Patrikar , “FPGA Implementation of Low power parallel multiplier ”, in Proc. of 20 th IEEE Int. VLSI Design conf., jan. 2007.

• Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar,”A CMOS Low Voltage Charge Pump”,in 20th Intl. Conf. on VLSI Design,2007

• Hassan M Raza and R. M. Patrikar “Hardware/software co-design simulation method for shared bus multiprocessor system” paper accepted at INDICON-2007 (IEEEIndia sponsored) International conference,Bangalore.

• Hassan M Raza and R. M. Patrikar “Verification of Multiprocessor system using Hardware/Software Co-simulation” paper accepted at SPIT-IEEE Colloquium 2007 international conference – Mumbai.

• Rahul Badghare; SanjivMangal,RaghvendraDeshmukh, RajendraPatrikar “FPGA Implementation of Low Power ASU Multiplier” VDAT 2007

• SaketSakunia, Shantanu A. Bhalerao, Abhishek V. Chaudhary, MukundJyotishi, Mandar Dixit, RaghavJumde, Rajendra M. Patrikar ” UbiSens: Achieving a low power Wireless Sensor Nodes” Fourth IEEE/IFIP International Conference on Wireless and Optical Communication Networks, 2007
• Navaram Kumar RajendraPatrikar, Kishore Kulat, ”A Double-Pulsed Latch Flip-Flop” VDAT 2007

2006

• Akojwar, S.G.; Patrikar, R.M.; “Real Time Classifier For Industrial Wireless Sensor Network Using Neural Networks with Wavelet Preprocessors” Industrial Technology, 2006. ICIT 2006. IEEE International Conference on 15-17 Dec. 2006 Page(s):512 – 517

• Sudhir G. Akojwar, R.M.Patrikar, Real Time Classifier For Industrial Wireless Sensor Network Using Neural Networks with Wavelet Preprocessors, IEEE International conference on Industrial Technology, (ICIT 2006), 15-17 Dec 2006, Mumbai, INDIA

• Mrunal. A. K, Shirasgaonkar. M, RajendraPatrikar ” Highly Linear and Efficient AlGaAs/GaAs HBT Power Amplifier with Integrated Linearizer”;,. IEEE APCCAS 2006, Dec 4-5, Singapore

• Mrunal. A. K, Shirasgaonkar. M, RajendraPatrikar “Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits”;. (IEEE APCCAS 2006, Dec 4-5, Singapore)

• Hassan M Raza, R.M.Patrikar, “Can controller implementation on FPGA” PCEA-IFToMM International conference – PICA 2006

• Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar,”Powering Wireless Sensor Nodes using Ambient RF Energy”,in IEEE Conf. on Systems, Man, and Cybernetics, 2006 Held on October 8-11, 2006 at Taipei, Taiwan

• Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar,”RF Energy Scavenging for Wireless Sensor Nodes”,in 10th IEEE VLSI Design And Test Symposium (VDAT), 2006 Held on August 9 – 12, 2006 at Goa

• Mrunal. A. K, Shirasgaonkar. M, RajendraPatrikar “Power Amplifier Linearization using a Diode”;, IEEE MELECON 2006, May 16-19, Benalmádena (Málaga), Spain, pages: 173-176, Digital Object Identifier: 10.1109/MELCON.2006.1653064

• Makrand Shirasgaonkar, A.K. Mrunal, Rajendra M. Patrikar “Power Amplifier Linearization Using Diode on Voltage”, The 13th IEEE Mediterranean Electrotechnical Conference – MELECON – Benalmádena (Málaga) , Spain – May 2006.
• Rajendra M. Patrikar “Design Planning for Uniform Thermal Distribution.” The 19th International conference on VLSI Design Jan.2006.
• Rajendra M. Patrikar Olivier Peyran “Design Planning for Uniform Thermal Distribution.” Design Planning for Uniform Thermal Distribution VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on 03-07 Jan. 2006 Page(s):541 – 544
• Mrunal. A. K, Shirasgaonkar. M, RajendraPatrikar “Highly Linear, Highly Efficient Power Amplifier Design, VDAT 2006, India.

• Rajesh Pande, R.M.Patrikar “Effect of surface roughness on RF MEMS switch. “at International Conference on MEMS and Semiconductor Nanotechnology (MEMS-NANO’05) December 2005 (I.I.T., Kharagpur).

• Amit Harode, AnupNarkhede, R.M.Patrikar ”An Investigation of the Temperature Dependence of the Mobility using Monte Carlo Method in Carbon Nanotubes” International Conference on MEMS and Semiconductor Nanotechnology (MEMS-NANO’05) December 2005 (I.I.T., Kharagpur).

• Rajesh S Pande, K.A. Borikar, R.M. Patrikar “Tool Development for Modeling of RF MEMS Shunt Switch.” National Conference on Microelectronics & VLSI. December 2005 (IIT,Powai)

• Sudhir G. Akojwar, R.M.Patrikar, “Neural Networks for Wireless Sensors networks.” National Conference on Microelectronics & VLSI. December 2005 (IIT,Powai) — Best Paper Award

• M.A.Gaikwad, A.S. Gandhi, R.M. Patrikar “Hybrid Network Architecture for Processor Connections on SoC.” National Conference on Microelectronics & VLSI. December 2005 (IIT,Powai)

• AnupNarkhede, R.M.Patrikar “Mobility calculations using Monte Carlo Method in Carbon Nanotubes” NSPAET March 2005.

• R.M.Patrikar “Simulation of Self Organisation process: A case study of Quantum Dots” NSPAET March 2005 (Invited Paper)

• Ganesan S Iyer and Rajendra M. Patrikar, “Effect on Surface Roughness on Physical Design Parameters.”8th VLSI Design & Test Workshops (VDAT), August,2004.

• Ganesan S Iyer and Rajendra M. Patrikar, “An Application of Neural Network Learning to Physical Design Optimization in VDSM Technology.” 8th VLSI Design & Test Workshops (VDAT), August,2004.

• RajendraPatrikar, Teo Teck Wei, Tan Kai, Anselm Yip “Improved Effective Electrode Area For Cell Capacitor by Removing Microroughness of HSG Films” TECH Technical Seminar Jan.21 2000.

• RajendraPatrikar and Yam Kwong Loon “Tailoring Maximum Electric Field In MOS Transistor Channel for HOT Carrier Reliability” TECH Technical Seminar Jan.21 2000.

• RajendraPatrikar and Tan Soo Hee “Yield Prediction for Y84 Devices Yield Improvement Methodology for Future Devices” TECH Technical Seminar Jan.21 2000.

• Chandorkar, R.M.Patrikar, “Reliability in Electronic Devices and Systems”, Proceedings of National Conference on Quality and Reliability, India, p. 64, (1990).